| 摘要 |
In the invention, a digital signal consisting of upper and lower bits is sampled while the upper and lower bits are divided. The sampled digital signal components of upper and lower bits are converted into upper and lower pulse width signals having a pulse width responding to their data value, respectively. Thereafter, the upper and lower pulse width signals are mixed and pass through a smoothing filter to convert the digital signal into an analog signal. The upper pulse width signal is formed of a pulse signal varying in a pulse width in response to the data value of the upper bits relative to a center of pulse width which has a fixed time position within a sampling period. The lower pulse width signal is formed of a combination of pulse signals varying in each pulse width in response to the data value of the lower bits relative to each center of pulse width which is at each pulse edge of the upper pulse width signal.
|
