发明名称
摘要 PURPOSE:To transfer a large quantity of data without interruption by dividing a memory to be used for transmitting/receiving data and enabling said memory to be used repeatedly. CONSTITUTION:The memory 2 to be used for data transfer is divided into N blocks. A DMA controller 30 contained in an I/O controller 3 reads out or writes data in each block. Every completion of reading-out or writing of the data in each block, the DMA controller 30 informs the completion to a CPU1 and turns the completed block to reusable status. After completing the reading out or writing of the whole areas of the memory 2, the DMA controller 3 returns the initial address of the memory 2. Since the fixed quantity of data can be used repeatedly, a large quantity of data can be transferred without interruption.
申请公布号 JPS6132710(B2) 申请公布日期 1986.07.29
申请号 JP19830003702 申请日期 1983.01.13
申请人 YOKOGAWA HOKUSHIN ELECTRIC 发明人 SATO TAKASHI;KANEKO YOSHIO
分类号 G06F13/28 主分类号 G06F13/28
代理机构 代理人
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