| 摘要 |
PURPOSE:To attain rapid countermeasure at the generation of a fault, to shorten the fault time and to improve system reliability by providing a simulation processor with a block state table, a connection table, etc. CONSTITUTION:Logical simulators 1, 1a-1c have the same constitution except a partial constitution and the simulator 1 is constituted of simulation processors 11, 12, a network 2 and a level controller 19. In the simulators other than the simulator 1, each controller 19 is arranged on the external. Each of processors 11, 12 is constituted of a controller 101, a block state table 102, a block simulator 103, and a connection table 104. In said constitution, the internal state of a simulated circuit is stored in the table 102, and if an error is mixed with the simulated result through the table 104, the controller 101, etc, the state of the simulated result can be detected from the external. Thus, rapid countermeasure at the generation of a fault can be attained, the fault time can be shortened and the reliability can be improved. |
