发明名称 FAULT DETECTION SYSTEM
摘要 PURPOSE:To always monitor a fault by displaying the AND output between the input of a unit monitor signal from a controller to each electronic circuit unit and the output of an in-unit normal operation monitoring circuit, and connecting fault detecting circuits successively in series through a buffer and connecting the final stage to the controller again in feedback form. CONSTITUTION:When an electronic circuit EC1 is in normal operation, the input signal A and the output signal B of the in-unit normal operation monitoring circuit 30 are ANDed by an AND circuit 40 to generates the AND circuit C; the normal operation state is displayed on a display device 50 and a normal operation signal is also inputted from a terminal OUT through the buffer 60. The next stage unit U2 receives it to perform the same operation with the unit U1 when the operation in the unit is normal, and transmits a signal to its next stage unit U3. If a fault occurs in the unit U3, the output B is not generated, so there is no output from the AND circuit 40 and the display device 50 does not turn on, so it is found that the unit U3 faults. Consequently, the faulty unit is detected easily.
申请公布号 JPS60154171(A) 申请公布日期 1985.08.13
申请号 JP19840010763 申请日期 1984.01.23
申请人 TOUHOKU OKI DENKI KK;NIHON MAIYAA KK 发明人 KAMABE TAKEYOSHI;KAWADA TOSHIEDA;OTOBE YOSHINORI
分类号 G01R31/02;G01R31/08;G01R31/28;H02H7/20 主分类号 G01R31/02
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