发明名称 INTERNAL BIAS GENERATING CIRCUIT FOR SEMICONDUCTOR DEVICE
摘要 PURPOSE:To lessen the fluctuation of an internal bias generating circuit, which is a circuit using a ring oscillator, by a method wherein the input voltage of a gate for the load MOSFETs of the ring oscillator is controlled and the oscillating frequency of the ring oscillator is controlled. CONSTITUTION:The internal bias generating circuit consists of a ring oscillator 51, a voltage generating circuit 52 including a charging pump circuit which is controlled by the output of the ring oscillator 51, and a level detecting circuit 53 which detects the output level of the voltage generating circuit 52. A gate A for load MOSFETs Q521, Q522...Q525 constituting the MOS inverter of the ring oscillator 51 is controlled by the output of the level detecting circuit 53. By such a constitution, the oscillating frequency of the ring oscillator 51 is controlled according to the output fluctuation of the voltage generating circuit 52 and, for example, the output fluctuation of the voltage generating circuit 52 is compensated.
申请公布号 JPS60152048(A) 申请公布日期 1985.08.10
申请号 JP19840007955 申请日期 1984.01.20
申请人 TOSHIBA KK 发明人 SAKUI YASUSHI
分类号 H03F3/345;G05F3/20;G11C11/408;H01L21/822;H01L27/04;H03F3/34;H03K19/096 主分类号 H03F3/345
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