发明名称 Information processing machine for interpretation of logic programming languages
摘要 An execution processor 10 equipped with a microprogrammable element 16 interacts via a bus 13 with a cellular memory 14, arranged to permit the creation of a trellis as well as that of cells of variable type. The execution processor 10 is microprogrammed for interpretation of a logic programming language such as PROLOG. The execution processor 10 interacts via requests with a memory management processor 12, with which there is associated a memory of the allocation status 15 of the cells of the memory 14. Working in alternate batches, the processor 12 runs through the trellises defined in the memory 14, so as to free the cells which have become unnecessary therein. This freeing is written into the allocation status memory 15. <IMAGE>
申请公布号 FR2559286(A1) 申请公布日期 1985.08.09
申请号 FR19840000604 申请日期 1984.01.16
申请人 INRIA 发明人 YVES JEAN ANTOINE BEKKERS, LUCIEN FRANCOIS UNGARO, BERNARD MAURICE CANET ET OLIVIER MARTIAL RIDOUX;UNGARO LUCIEN FRANCOIS;CANET BERNARD MAURICE;RIDOUX OLIVIER MARTIAL
分类号 G06F9/44;G06F12/02;(IPC1-7):G06F9/44 主分类号 G06F9/44
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