| 摘要 |
<p>PURPOSE:To constitute a variable delay circuit which outputs an optional delay time and an optional pulse width, by providing two comparing means whose reference values can be varied and an EX-OR circuit which processes comparison outputs of these comparing means through flip-flops. CONSTITUTION:An integration circuit 3 integrates a square wave inputted from a terminal 1 and inputs the integral result to two comparators 6 and 7. The comparator 6 is operated to raise the output of a flip-flop 8 when the input level exceeds the first reference value V1. The comparator 7 is operated to allow the output of a flip-flop 9 to fall when the input level exceeds the second reference value V2. As the result, a delay pulse whose delay time is determined by the first reference value V1 and pulse width is determined by the second reference value V2 is obtained from an output terminal 11 of an EX-OR circuit 10.</p> |
