| 摘要 |
PURPOSE:To make a chip area small and to reduce current consumption by providing a decoder equipped to simultaneously drive two switch elements of either one of groups of the first and second switch element groups - n-th and (n+1)th switch element groups. CONSTITUTION:Information of digit lines D1 and D2 are transmitted to data bus lines RB2 and RB1 respectively. The bus lines RB1 and RB2 are inputted in a data selector circuit 5, and the data selector circuit 15 transmits information of only one data bus line selected by a Y-decoder (2) 14 to a terminal READ OUT through an amplifier 21. The information is inputted in the circuit 15 given to a terminal WRITE IN when writing in, selects a data bus line written by the Y-decoder (2) 14, transmits the written data to the selected data bus line, connects to the data bus line, and transmits the written data only to one of the digit lines selected by a Y-decoder (1) 4. |
