发明名称 GENERATOR OF DIGITAL CYCLE WAVEFORM
摘要 PURPOSE:To obtain a generator of digital cycle waveforms which has no change of quantizing noises despite repetitive changes of frequency, by using the output of an address counter as a reading address of a memory to deliver repetitively the digital data. CONSTITUTION:A memory 5 samples the amplitude value of each phase point obtained by dividing equally a waveform equivalent to (k) cycles of an analog signal by 3 prime numbers (p). Then (p) pieces of data coded to quantizing data of (n) bits are written successively on addresses between 0 and (p-1). An address counter 4 defines the number (p) as a divisor and counts every N pieces for each sampling clock, and this count output is supplied to the memory 5 as an address designating signal. For the output of the memory 5, all digital data stored in addresses between 0 and (p-1) appear evenly. In other words, the data of all addresses are delivered by one time at (p) times of application of sampling clocks regardless of the value of N. Therefore the quantizing noise power contained in the output is constant regardless of the frequency.
申请公布号 JPS60150117(A) 申请公布日期 1985.08.07
申请号 JP19840004622 申请日期 1984.01.13
申请人 NIPPON DENKI KK 发明人 KAWAYAUCHI NOBORU
分类号 G01R31/28;G06F1/02 主分类号 G01R31/28
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