发明名称 Silicon gigabit metal-oxide-semiconductor device processing
摘要 In a metal-oxide-semiconductor device process, parasitic capacitance is significantly reduced by differentially oxidizing a substrate and a gate mesa thereon prior to ion implantation and "drive-in" of the drain and source regions. This results in a channel region being formed in the substrate beneath and substantially coextensive with the gate mesa. The conductivity of the channel region is different from the conductivity of the adjacent source and drain regions. In one embodiment, the source and drain regions each extend to a greater depth into the substrate with increasing distance from the channel region.
申请公布号 US4532697(A) 申请公布日期 1985.08.06
申请号 US19830557638 申请日期 1983.12.02
申请人 AT&T BELL LABORATORIES 发明人 KO, PING K.
分类号 H01L29/78;H01L21/265;H01L21/28;H01L21/321;H01L21/336;H01L29/08;(IPC1-7):H01L21/225;H01L21/425 主分类号 H01L29/78
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