发明名称 INTERRUPTION PROCESSING SYSTEM
摘要 PURPOSE:To prevent missing of control information by processing the information with an interruption terminal impossible for mask when the control information is transmitted/received with an external device via a microprocessor. CONSTITUTION:The control information between the microprocessor 1 and a communication controller 5 is transmitted and received all in the unit of words and the fetch/transmission of the control information by the microprocessor 1 is processed by a corresponding processing routine through the unmasked interruption from an interruption terminal 6 not masked. On the other hand, in peripheral interface adoptors 3-1-3-N connecting a synchronism control section 4 and the microprocessor 1, the corresponding processing routine is started by transmitting an IRQ interruption via an IRQ interruption terminal 7 so as to attain the processing respectively.
申请公布号 JPS60145750(A) 申请公布日期 1985.08.01
申请号 JP19840001463 申请日期 1984.01.09
申请人 FUJITSU KK 发明人 HAMADA SHIGERU
分类号 H04L29/02;G06F13/00;H04L13/00 主分类号 H04L29/02
代理机构 代理人
主权项
地址