Process for fabricating a junction field effect transistor

摘要

The invention relates to a process for fabricating a junction field effect transistor, in which the surface layer designed to pass the current has a reduced cross-section in the channel region. The invention consists in applying a photoresist mask to the initially uniformly thick surface layer of the first conductance type. Through a hole in said photoresist mask, the surface layer is reduced down to a residual thickness. Through the same hole of said mask imperfections are then implanted into the surface layer, which there give rise to the second conductance type. Finally the mask already mentioned is used as a contacting mask in the fabrication of the gate electrode.