| 摘要 |
PURPOSE:To set optionally the charge and discharge time of a capacitor by controlling the opening and closing of the 1st switch connected between a current detector and the capacitor in series and the 2nd switch connected to the current detector in parallel. CONSTITUTION:The switch 7 connected between the detector 1 and capacitor 2 in series and the switch 8 connected to the detector 1 in parallel are closed to enter a reset or wait state. Further, the switch 7 is closed and the switch 8 is opened to enter a sampling state; and the switch 7 is opened and the switch 8 is closed to enter a hold state. Thus, those switches 7 and 8 are controlled to set those three states continuously at optional time. The voltage of each capacitor is read out in the hold state and inputted to an A/D converter 6 through switches 3 and 4 and an amplifier 5.
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