| 摘要 |
PURPOSE:To attain a high-speed operation and simple constitution of an address converting circuit by dividing a memory part into optional numbers of blocks, and providing address comparison parts and address storage parts corresponding to each block to omit a high-speed memory and a write/read circuit. CONSTITUTION:A logical address 3 produced from a central processing part 1 is divided into high-order and low-order addresses 10 and 13 by an address dividing part 7. The address 13 is used as an address within an optional block of a memory part 20. While the address 10 is compared with a comparison address 11 fed from an address storage part 9 by an address comparison part 8. When the coincidence is obtained between both addresses 10 and 11, a coincidence signal 12 is sent to the corresponding block of the part 20. Thus only this block can be read and written. In other words, the address 3 is converted into a physical address just through the parts 9 and 8 corresponding to an optional number of blocks of the part 20. |
