发明名称 WRITING METHOD AT LOW VOLTAGE OF NONVOLATILE SEMICONDUCTOR MEMORY
摘要 <p>PURPOSE:To execute writing sufficiently at low voltage by applying high voltage to an erasing electrode, forcibly extracting a large amount of electrons in a floating gate electrode and charging the floating gate electrode at positive electricity. CONSTITUTION:DC power supplies 12-14 and switched 15-17 are each connected between a selective gate electrode 4 and a source electrode 8, between an erasing electrode and the source electrode and between a drain electrode 9 and the source electrode. A flating gate electrode 6 and a drain region 3 are capacitive-coupled intensely, and the potential of the electrode 6 is controlled by drain voltage. The power supply such as one 13 is set at approximately 10V and the power supply such as one 14 at zero V before writing operation, the switches such as ones 16, 17 are turned ON, and excess electrons in the electrode 6 are extracted and the electrode 6 is brought to an approximately neutral state. The switches are turned OFF, the power supply 12 is set at a value close by the threshold voltage of a first region and the power supply 14 at 5-10V and the switches 15, 16 are turned ON on writing. When the threshold voltage of a second channel region is set at 2-3V, surface potential on a boundary between both channels steeply changes.</p>
申请公布号 JPS60144976(A) 申请公布日期 1985.07.31
申请号 JP19840001200 申请日期 1984.01.06
申请人 SEIKO DENSHI KOGYO KK 发明人 TAKADA RIYOUJI
分类号 G11C17/00;G11C16/04;H01L21/8247;H01L27/115;H01L29/78;H01L29/788;H01L29/792 主分类号 G11C17/00
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