发明名称 SIMULTANEOUS COUNTING CIRCUIT
摘要 PURPOSE:To make an accurate random coincidence correction by making coincidence time window width accurately coincident between an on-time and an off- time side. CONSTITUTION:When an input signal A is inputted, a delay pulse with constant width appears at the non-inverted output terminal of an FF circuit 7 and is inputted to an AND gate 15 forming a coincidence detecting circuit. When an input signal B is inputted, a preceding pulse appears at the non-inverted output terminal of an FF circuit 12 and then a succeeding pulse is generated on the basis of a signal delayed by a delay element 10. The output of the AND circuit 15 is inputted to an FF circuit 16, whose output is inputted to an AND gate 17. The output of the AND gate 17 is inputted to an FF circuit 18. The output of an AND gate 16 is counted when the AND gate 17 generates no output to obtain the counted value of only the off-time side, and the output of the AND gate 16 is counted when the AND gate 17 generates the output to obtain the counted value of the on-time side.
申请公布号 JPS60144684(A) 申请公布日期 1985.07.31
申请号 JP19830249044 申请日期 1983.12.31
申请人 SHIMAZU SEISAKUSHO KK 发明人 YAMAMOTO SEIICHI;TAKAHASHI SHIGEKAZU
分类号 G01T1/161;G01T1/172 主分类号 G01T1/161
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