| 摘要 |
PURPOSE:To make a feedback mechanism unnecessary and to reduce the titled circuit in scale by detecting a supplied write data signal even it is kept in either high or low level state. CONSTITUTION:When the write data signal is kept in a high or low level state due to a short-circuited head troubled circuit, the potentials Va, Vb of terminals A, B are made unchanged after lapse of a predetermined time. With the potential Va at a high level, a capacitor C1 continues to be charged in a capacitor C1 through a transistor Q6 so that the potential Vn1 at a node n1 exceeds a reference voltage Vref2, as shown by the dotted line (a). With the voltage remaining at the low level, the capacitor C1 continues to be discharged through a transistor Q4 so that the potential Vn1 of the node n1 falls below the reference voltage Vref1 as shown by the dotted line (b). As a result, the output of comparators CMP1 or CMP2 is inverted to produce an abnormality signal phid. |
