发明名称 VERNIER ADDRESSING APPARATUS
摘要 <p>VERNIER ADDRESSING APPARATUS A vernier address scale reduces the number of addressable memory locations required for numerical look-up tables. Readonly memories (ROMs) store the data of linear or non-linear functions. Decoders determine which ROM is selected and advantage is taken of accuracy improvement as numbers become larger by dropping least significant bits as the vernier address scale moves from one ROM table to another. Accuracy is further improved by using a method of one-half level quantization step for rounding. This reduces the size of numerical tables for math processing of reciprocals, roots of numbers, powers of numbers, logarithms, trigonometric and exponential functions.</p>
申请公布号 CA1191275(A) 申请公布日期 1985.07.30
申请号 CA19830430428 申请日期 1983.06.15
申请人 RAYTHEON COMPANY 发明人 CANTWELL, ROBERT H.
分类号 G06F1/02;G01S7/292;G06F1/035;(IPC1-7):G11C8/00;G06F7/00 主分类号 G06F1/02
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