发明名称 Apparatus for error correction
摘要 In apparatus for error correction in which data sequences containing blocks of data, previously arranged on a known time-base, and formed of data words and check words are written into a memory under control of a write address generator, and the data sequences are subsequently read out from the memory under control of a write address generator, so as to generate rearranged data sequences; during writing and reading of the data sequences, error correction is carried out by apparatus that includes an error correction arithmetic circuit for performing the error correction calculation, a pointer addition circuit for adding a pointer to the data words in association with an error state of the blocks, and a memory for memorizing a microprogram having fields to control the error correction arithmetic circuit and pointer addition circuit.
申请公布号 US4532629(A) 申请公布日期 1985.07.30
申请号 US19830459128 申请日期 1983.01.19
申请人 SONY CORPORATION 发明人 FURUYA, TSUNEO;FUKAMI, TADASHI
分类号 G06F11/10;G11B5/09;G11B20/18;H03M13/00;H03M13/27;(IPC1-7):G06F11/10 主分类号 G06F11/10
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