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发明名称
CIRCUIT ARRANGEMENT FOR SIMULTANEOUS CONTROL OF PARALLEL AND SERIES IMPUT AND OUTPUT PERIPHERIES AND DATA-TRANSMITTING CHANNELS, PREFERABLY FOR CONTROLLING, FAULT-SIGNALLING AND LINE.MATCHING UNITS OF INDUSTRIAL MODULAR CONTROL UNITS
摘要
申请公布号
HUT35866(A)
申请公布日期
1985.07.29
申请号
HU19820000056
申请日期
1982.01.08
申请人
CZILI,GYULANE,HU;GAL,GYULA,HU;BANKUTI,PAL,HU
发明人
CZILI,GYULANE,HU;GAL,GYULA,HU;BANKUTI,PAL,HU
分类号
G06F13/00;(IPC1-7):G06F13/00
主分类号
G06F13/00
代理机构
代理人
主权项
地址
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