| 摘要 |
PURPOSE:To obtain stabilization in the holding condition of the memory without increasing the load resistance and the holding current by connecting a capacitor to a Schottky barrier diode in parallel. CONSTITUTION:By connecting capacitors Cp1 and Cp2 for stabilizing the memory operation to an SBD1 and SBD2 in parallel, the holding condition of the memory cell becomes stable without giving the damage to the high-speed operation at the time of selecting the memory cell. When a transistor T1 is in the conduction condition and a transistor T2 is in the breaking condition, the capacitor Cp1 is charged with the holding current, and the holding condition is inverted after discharging the charge of the capacitor Cp1 and charging the capacitor Cp2. Since it takes time to discharge and charge, the storage holding condition of the memory cell becomes stable. Since condition inversion of the transistors T1 and T2 does not occur easily at the time of reading or writing, the writing error due to the noise does not occur easily. |
