发明名称 ADDRESS CONVERSION CONTROL SYSTEM
摘要 PURPOSE:To improve the efficiency of a pipe line system by executing a partial purging of an address conversion buffer by using a memory array separately from normal access processing to an address conversion buffer. CONSTITUTION:Normal instruction fetching and operand accessing to the address conversion buffer 1 are inputted to an execution address register 2. On the basis of said access, a part of multiple virtual storage identification and an logical address are compared with the multiple wirtual storage identification from a multiple virtual storage identification register 4 and a logical address from said register 2 by comparators 3, 3' respectively. If The physical address of an entry does not conicide with that set up in a purge register 7 as the result of comparison by comparators 9, 9' when any one of the comparators 3, 3' detects coincidence, the physical address of the entry is sent to a real address register 5 and used as an access address.
申请公布号 JPS60142451(A) 申请公布日期 1985.07.27
申请号 JP19830246112 申请日期 1983.12.29
申请人 FUJITSU KK 发明人 TONE HIROSADA;TANAKA TSUTOMU
分类号 G06F12/00;G06F12/08;G06F12/10;(IPC1-7):G06F12/10 主分类号 G06F12/00
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