| 摘要 |
PURPOSE:To improve a decoding rate and allow decoding in time in accordance with a compression ratio by reproducing original data in parallel from the run length obtained by decoding to the maximum N bit. CONSTITUTION:The adder 22 adds (its output is L) the content M (number of bits reproduced so far) of a register 21 to run length L when the number of run length L is inputted. This output L' converts into L'=kXN+I (1<=I<=N-1) and fetch (k) into a counter 23 and I into a register 24. The device inputs the contents M of the register 21, content I of the reigster 24 and output alpha of an OR gate 25 on a ROM26, and sets in the part of a latch 27 the values of a kind P of a picture element of the number of run length L reproduced according to the values. Where the device processes up to the maximum N bit in parallel, the device compares relations of big or small between L' and N, reproduces the number of run length in accordance with their big or small relations.
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