发明名称
摘要 PURPOSE:To shorten the diagnosis time by selecting simultaneously the plural units of the diagnosed parts featuring the same logic structure or the diagnosed logic module via the module designation register for diagnosis. CONSTITUTION:The logic sum is obtained through gate 5 for the data obtained by scanning out the plural number of the diagnosed part and then set to register SODR6. In this case, only the scanned-out data of the diagnosed part selected via module designation register MODR2' is led to AND gate 10. The output of NOT gate 8 is led to gate 10 instead of the scanned-out data given from the diagnosed part which is not selected via MODR2', and the compensation is given so that the logic product may be secured only among the scanned-out data to each other given from the diagnosed part selected. In case the presence is recognized via FLP for the diagnosed part carrying out the scan-out different from the normal value, the diagnosed parts are designated sequentially and individually via MODR2' to have a comparison between the logic product and the normal value. Thus the faulty point is found out.
申请公布号 JPS6032213(B2) 申请公布日期 1985.07.26
申请号 JP19780156396 申请日期 1978.12.20
申请人 HITACHI LTD 发明人 SATO HIROAKI
分类号 G06F11/22;G06F11/00 主分类号 G06F11/22
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