| 摘要 |
PURPOSE:To prevent the temperature rise due to the heat generation of a three- dimensional semiconductor device by a method wherein a p-channel MOSFET and an n-channel MOSFET are laminated up and down. CONSTITUTION:An output terminal VOUT is connected to an n type layer 7 forming the drain of the lower layer n-channel MOSFET16 and a p type layer 13 forming the drain of the upper layer p-channel MOSFET15, and a power source VDD is connected to a p type layer 13 forming the source of the upper p-channel MOSFET15; then, the n type layer 7 forming the source of the lower layer n- channel MOSFET16 is grounded. For common connection of gate terminals, the n type layer 7 forming the gate of the MOSFET16 is connected to the p type layer 13 forming the gate of the MOSFET15 by boring a window in an Si oxide 9. This manner enables the upper and lower layers to avoid the combination of MOS transistors turning on at the same time, resulting in the prevention of heat generation. |
