发明名称 OUTPUT CONTROLLER
摘要 PURPOSE:To improve a processing speed by storing plural character data or the like on plural memory area on a same memory while being applied with dot expansion, and applying merging to the data and transmitting them to an output device simultaneously with read. CONSTITUTION:A normal character data and a form data are expanded to separate areas 22, 23 on the memory 21, they are read at the same time, the read data is merged and outputted to the output device 25. In this case, the normal character data is allocated to the area 22 of the memory section 21 and the form data is allocated to the area 23 and they are applied to dot expansion. Both the data read from both areas 22, 23 at the same time are displayed as print at the output device 25 via an OR gate 24. Thus, since the memory access unit is in the unit of data width of the memory, the check circuit such as hamming code check circuit is used as a conventional circuit.
申请公布号 JPS60140421(A) 申请公布日期 1985.07.25
申请号 JP19830247197 申请日期 1983.12.28
申请人 HITACHI SEISAKUSHO KK 发明人 ABE AKIRA;HAGIWARA YOSHITO
分类号 G06F3/12;B41J5/30;B41J21/00;G06K15/10;G06K15/22 主分类号 G06F3/12
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