发明名称 CHANNEL CONTROL SYSTEM
摘要 PURPOSE:To increase the number of peripheral devices with low cost by providing the 2nd memory part at the memory part of a channel controller and transferring the control information stored in the 2nd memory part when necessary. CONSTITUTION:When a data processor 1 gives a start request of an input/output terminal device 4-1 to a channel controller 3, the controller 3 receives the request at a channel control part 31. The part 31 controls the input/output devices 4-1-4-n by the control information of a subchannel memory 32 and the data of a main memory via an input/output interface control part 34. Here a subchannel memory 33 is provided as the 2nd memory part. The memory 32 always stores the control information which is used at all times; while the memory 33 stores the control information having little using frequency. Thus the control information stored in the memory 33 is transferred to the memory 32 when necessary for processing. In such a way, the peripheral terminal devices can be increased easily with addition of a low-speed memory 33.
申请公布号 JPS60138659(A) 申请公布日期 1985.07.23
申请号 JP19830248042 申请日期 1983.12.27
申请人 FUJITSU KK 发明人 SASOU HIDEYUKI;TAKAHASHI KIYOSHI;KONDOU KOUICHI
分类号 G06F13/12;(IPC1-7):G06F13/12 主分类号 G06F13/12
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