发明名称 ADDRESS EXTENSION CIRCUIT
摘要 PURPOSE:To obtain an address extension circuit which is connected to a microprocessor that produces the address information by applying address modification using a complement of 2 with code to a base address. CONSTITUTION:A muCPU4 outputs a lower 18-bit signal (v) of the address information (l), a signal (t) containing the boundary information obtained by modifying the address information of upper 2 bits, and a signal (p) containing high- order 3 bits of a base address of 21 bits. The signal (p) is connected to a 3-bit register 5, and the output (q) of the register 5 is connected to the input of the 1st 3-bit adder 6. A signal (r) containing the information (n) is connected to the input of the other side of an adder 6, and the output signal (s) of the adder 6 is supplied to the 2nd 3-bit adder 7. The output signal (t) of the CPU4 is connected to the input of the other side of the adder 7, and signals (s) and (t) are added together to obtain a signal (u). The signal (u) contains high-order 3 bits of the extension address information (o). Then the information (o) of 21 bits is produced.
申请公布号 JPS60138641(A) 申请公布日期 1985.07.23
申请号 JP19830247383 申请日期 1983.12.27
申请人 NIPPON DENKI KK 发明人 SUGANO SATOSHI
分类号 G06F9/34;G06F12/02 主分类号 G06F9/34
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