<p>A method of synchronizing a digital radio pager receiver with incoming digital data signals. At switch-on the receiver first attains a "course" bit synch during the first quarter-word period and then a "fine" bit synch during the next half-word period. The receiver then examines incoming data bits to determine simultaneously (a) whether valid data is being received and (b) whether the incoming data contains a preamble sequence. If either determination is successful the incoming data is then examined to determine whether it contains a synchronizing word or an address word. The synchronization and address word determination is also carried out while bit synch is obtained and the valid data/preamble determination is effected.</p>
申请公布号
CA1190968(A)
申请公布日期
1985.07.23
申请号
CA19820408471
申请日期
1982.07.30
申请人
INTERNATIONAL STANDARD ELECTRIC CORPORATION
发明人
VANCE, IAN A.W.;BIDWELL, BRIAN A.;JEFFREY, COLIN;LEEVERS, DAVID F.A.;WOODLEY, MICHAEL J.A.