| 摘要 |
PURPOSE:To reduce the overhead of back tracking due to the parallel processing and to attain the high speed processing by allotting each sentence processing of 1-tier predicate logical language like PROLOG, etc. previously to each unit processor. CONSTITUTION:An input/output processor IOP1 reads a program sentence recorded to a DISK7 into a memory 12. Then the first program sentence is transferred to a transmission buffer of an interface 13, and the transmission right is waited for from a unit processor UPn. The transmission right is transferred and sent onto a common bus 3. When this transmission is over, the transmission right is shifted to a UP1. Then the next program sentence, if exists, is sent to the transmission buffer of the interface 13. After the transmission right is shifted, the program sentence within the transmission buffer is sent out. This action is repeated to transmit successively all program sentences.
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