DIRECT MEMORY ACCESS ADDRESS CONTROL SYSTEM

摘要

PURPOSE:To set a memory leading address without assistance of a CPU by reading the leading address from a first-in/first-out circuit. CONSTITUTION:Prior to receiving, a CPU2 sets the leading address on a memory 3 to an FIFO circuit 6 by an address storage signal ''f''. Here, the CPU2 sets the leading address of the receiving buffer on the memory 3 as far as possible so that plural data from a data circuit 5 can be received. Then, the CPU2 outputs a DMA transfer instruction datum ''a'' to a DMA transfer circuit 4. When the DMA transfer circuit 4 receives the above-mentioned instruction datum ''a'', the circuit 4 outputs a ''read sgnal'' ''b''. When the circuit 4 reads an address datum ''c'' for the abovementioned datum ''b'', the circuit 4 sets the address datum ''c'' to the DMA transfer circuit 4.