发明名称 MANUFACTURE OF MIS TYPE SEMICONDUCTOR DEVICE
摘要 PURPOSE:To remove the steep stepped section of a gate electrode section, and to prevent a breaking at a stepped section and the lowering of the capacity of a mask even when a mask layer is formed thinly by jointly using isotropic etching and anisotropic etching on the formation of the gate electrode. CONSTITUTION:A P well 22, field oxide films 23 and gate oxide films 24 are formed to an N type substrate 21, and a gate electrode material layer is shaped on the whole surface of the substrate 21. The gate electrode material layer is etched up to desired thickness through isotropic etching while using a mask layer with a desired pattern as a mask for etching. The remainder is etched through anisotropic etching to form gate electrodes 25. When the electrode 25 is shaped in this manner, the steep stepped section of the gate electrode section is removed, and a breaking at a stepped section and the lowering of the capacity of the mask are eliminated even when a mask layer 26 on the ion implantation of a P channel transistor is formed thinly. Accordingly, the withstanding voltage of a junction is not deteriorated.
申请公布号 JPS60134475(A) 申请公布日期 1985.07.17
申请号 JP19830243302 申请日期 1983.12.23
申请人 NIPPON DENKI KK 发明人 TAKAYAMA SHIYOUJI
分类号 H01L27/092;H01L21/302;H01L21/3065;H01L21/8238;H01L29/78 主分类号 H01L27/092
代理机构 代理人
主权项
地址