| 摘要 |
PURPOSE:To improve the degree of integration of a dynamic RAM by forming a decoder section selecting word lines to the predetermined section of a memory cell array while being connected to an output section from the array and forming signal lines to an input section to the detector at the ratio of one to the word lines in prescribed number. CONSTITUTION:Cells 2 consisting of memory cells M-ARY1-M-ARY4, M-ARY5 -M-ARY8 in which capacitors storing information charges and switching elements are connected in series are arranged to a dynamic RAM element 1, an upper end section and a lower end section thereof each have external terminals 10, in a procession shape. Dummy cells 3 are formed in several cell 2, senses amplifiers 4 are connected separately to the cells 2, and the cells 2 are amplified through bit lines extending in the line direction. An X decoder 5 is shaped to one side end sections of cell array rows, and connected to one of word lines in predetermined number through a Y decoder 7 positioned between processions and Y decoders 6 each formed among the cells 2. Peripheral circuits 8 containing main amplifiers 9 are formed to the other side section opposite to the X decoder 5. |
