| 摘要 |
The invention relates to a method of handling machine-coded instruction words. The instruction words each comprise an opcode part and an operand descriptor part. The collection of opcode parts is subdivided into two classes. A first class comprises normal opcode parts which are processed in known manner, while a second class comprises virtual opcode parts which are processed in a particular manner. This particular manner implies inter alia that the instantaneous program counter position is temporarily stored in a supplementary program counter register and that a memory address is determined. When an opcode part of the virtual type is decoded the associated operand descriptor part is loaded into an index register. The descriptor part of an instruction with virtual opcode is handled by a series of instructions, the first of which is located at the said memory address. <IMAGE> |
