发明名称 INTEGRATED SEMICONDUCTOR LOGIC CIRCUIT DEVICE
摘要 PURPOSE:To miniaturize the whole circuit device while increasing the speed of the circuit device by forming a region having an irregular logic circuit function and a region having an input-output circuit forming region and a regular logic function on one semiconductor substrate. CONSTITUTION:An irregular logic circuit forming region 2 forming an irregular logic circuit having an irregular logic circuit function and a regular logic circuit forming region 3 shaping a regular logic circuit having a regular logic circuit function are formed on a semiconductor substrate 1. Input-output circuit forming regions 4 to the regular logic circuit are shaped on both sides of the region 3, and a plurality of logic-signal input-output terminals 5 are formed to the peripheral section of the substrate 1. When the regular logic circuit is a read-only memory circuit, the regular logic circuit is constituted by a memory element 11 consisting of matrix-shaped transistors, metallic wirings 12 in the row direction and metallic wirings 13 in the line direction. When the regular logic circuit is a programmable logic array circuit, the circuit is constituted by matrix-aligned memory elements 21, an AND circuit 23, an OR circuit 24, etc.
申请公布号 JPS60134462(A) 申请公布日期 1985.07.17
申请号 JP19830242812 申请日期 1983.12.22
申请人 NIPPON DENSHIN DENWA KOSHA 发明人 HORIGUCHI KATSUJI;ISHITANI TSUNEHACHI;ISHIKAWA KEIJI
分类号 H01L21/822;H01L21/82;H01L27/04;H01L27/10;H01L27/112;H03K19/177 主分类号 H01L21/822
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