发明名称 COINCIDENCE DETECTING CIRCUIT
摘要 PURPOSE:To simplify circuit constitution, to improve the yield and reliability and to save power consumption by constituting a two-input detecting circuit of a combined circuit between an inverter circuit via wired coupling line subject to pull-up or pull-down and an NOR circuit inserted between power supply potential. CONSTITUTION:When a bit arrangement a1,...am of an input data A is (110...1), and bit arrangement b1...bm of a data B is (000...0), a series circuit comprising transistors (TRs) Q'a3, Q'b3 is conducted, a power supply potential VDD is applied to a wired coupling line T1, and when both are respectively (111...1) and (000...1), a series circuit comprising TRs Qam and Qbm is conducted and a power supply potential Vss is fed to a wired coupling line T2. Thus, in case of the former, since TRQ31 is conductive and a TRQ30 is nonconductive, the arithmetic output Y is detected at a low level, and in case of the latter, the TRQ30 is conductive and a TRQ'31 is conductive, then the arithmetic output Y is detected similarly at a low level.
申请公布号 JPS60134627(A) 申请公布日期 1985.07.17
申请号 JP19830243319 申请日期 1983.12.23
申请人 NIPPON DENKI KK 发明人 SHIMADA JIROU;MORITO HIROSHI
分类号 G06F7/02;H03K19/21 主分类号 G06F7/02
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