发明名称 FAST RECOVERY BIAS CIRCUIT
摘要 A programmable bias circuit for use with a data limiter circuit is described. The limiter and bias circuit are coupled to a portable data receiver which is adapted to communicate in a coded system. Frequency disparities between a transmitted word sync signal and the portable data terminal local oscillator signal will cause a DC offset voltage in the received data signal. The programmable bias circuit is controlled by a decoder within the portable data terminal. If the terminal is in an idle state, the programmable bias circuit will be set to rapidly follow offset voltage shifts until a transmitted word sync signal has been detected. After word sync has been detected, a slower, more stable time constant circuit is programmably activated for the duration of the digital data message. The fast time constant circuit is activated at the end of the received data signal.
申请公布号 AU3743085(A) 申请公布日期 1985.07.12
申请号 AU19850037430 申请日期 1984.11.29
申请人 MOTOROLA, INC. 发明人 BUTCHER, JAMES STEVEN
分类号 G08B3/10;H04L7/04;H04L25/06 主分类号 G08B3/10
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