| 摘要 |
PURPOSE:To enable elements to be made fine by preventing the decrease in resistance to the second layer when the first layer is decreased in resistance by impurity ion implantation by a method wherein, in constructing a wiring or a resistance layer used for a semiconductor memory element by means of a double- layer structure of polycrystalline Si, the second layer is electrically connected to the second layer with a high melting point metal layer. CONSTITUTION:On the surface of a semiconductor substrate 21 with circuit elements, an SiO2 film 22 of required form is produced by heat treatment in a high- temperature oxidizing atmosphere, and a polycrystalline Si layer 23 of the first layer connected to the circuit elements at one end is deposited thereon. Next, the layer 23 is decreased in resistance to be suitable for wiring purpose by impurity diffusion, and is then covered with an Si3N4 film 24. An aperture is bored by corresponding to the connection point, and the part of the exposed layer 23 is filled with a high melting point metal 25 such as W or Mo that is not permeable to impurities. Thereafter, a polycrystalline Si layer 26 of the second layer is deposited over the entire surface including it and patterned; then, the entire surface is covered with an insulation protection film 27. In such a manner, the Si layer 26 of the second layer is not decreased in resistance. |
