发明名称 BUS EXTENSION METHOD OF COMPUTER SYSTEM
摘要 PURPOSE:To attain a simplified bus extension method by subjecting the power supply line of a computer and that of an extended input/output device to wired OR connection and using them for power supply to both bus interfaces. CONSTITUTION:Power supply lines VIF subjected to wired OR connection by diodes D1 and D2 are used for power supply to a bus interface part 5 of a basic part A and a bus interface part 7 of an extended input/output part B. Then, power passing power supply lines VIF is supplied stably to the bus interface part 5 or 7 even if a power source VCC1 or VCC2 is turned off. The basic part A and the extended input/output part B are provided with voltage detecting circuits VC1 and VC2 which detect fall of voltages of power sources VCC1 and VCC2; and when voltages of power sources fall, inhibiting signals DS1 and DS2 which hold busses 4 and 8 in the high-impedance state are generated for the purpose of preventing unnecessary currents from flowing out to these busses.
申请公布号 JPS60129870(A) 申请公布日期 1985.07.11
申请号 JP19830237784 申请日期 1983.12.19
申请人 TOSHIBA KK 发明人 OBATA YOSHIMORI
分类号 G06F13/36;G06F13/40 主分类号 G06F13/36
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