发明名称 RESIST STENCIL MASK FOR MANUFACTURING JOSEPHSON IC
摘要 PURPOSE:To enable the increase in the thickness and the intruding width of an overhang part by a method wherein the time of dipping in C6H5Cl is prolonged for the resist after exposure, which is thereafter treated by after-baking. CONSTITUTION:The surface of a substrate 61 is coated with a positive type resist of 1.0-1.5mum film thickness, and pre-baking of about 70 deg.C and about 30min is performed. Next, a desired pattern is exposed to this resist film, and then this film is dipped in C6H5Cl for 15-20min. This resist film is treated by post-baking of about 70 deg.C and 10-20min. 1-3min development is performed with an alkaline developer. As the result, the stencil mask 62 of the upper electrode having the overhang part 63 with the increased thickness and intruding width can be obtained. The use of this mask enables complete prevention of the swelling and the exfoliation of the upper electrode pattern of a Josephson IC.
申请公布号 JPS60130183(A) 申请公布日期 1985.07.11
申请号 JP19830237813 申请日期 1983.12.19
申请人 KOGYO GIJUTSUIN (JAPAN) 发明人 YAMADA KOUJI;MATSUDATE FUMIE;MIYAMOTO NOBUO;HIRANO MIKIO
分类号 H01L21/306;H01L39/24 主分类号 H01L21/306
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