Data comparison circuit constructed with smaller number of transistors.

摘要

A circuit for comparing first and second binary coded digital data signals has a plurality of first circuits each including first and second transistors of a P-channel type connected in series between a first potential terminal and a first output node. a plurality of second circuits each including third and fourth transistors of an N-channel type connected in series between a second potential terminal and a second output node, and means for precharging the first and second output nodes to first and second logic levels, respectively. The first and third transistors are supplied with one bit data of the first signal, and the second and fourth transistors are supplied with an inverted data of the second signal. A change in the logic level at at least one of the first and second output nodes is detected.