| 摘要 |
<p>A clocked differential cascode voltage switch (CVS) logic system is provided for a complete logic family which has a first switching circuit (10) that produces a given output signal at a first output node (14) and a second switching circuit (12) that produces a second output signal which is the complement of that of the given output signal at a second output node (18). First and second clocked devices (24, 28) are connected from the first and second output nodes (14, 18), respectively, to a voltage source (VH), the first and second inverters (32, 34) are connected to the first and second output nodes (14, 18), respectively. Additionally, a regenerative circuit (26, 30) may be connected between the first and second output nodes (14, 18) and the voltage source (VH). </p> |
