发明名称 CONNECTION ORDER CHECK SYSTEM
摘要 PURPOSE:To make it possible that a master station recognizes the connection order of slave stations only with fundamental transmission and reception functions, by receiving all frames, which pass each slave station, in the slave station and reporting stored addresses from the slave station to the master station and counting and comparing addresses from individual slave stations in the master station. CONSTITUTION:The master station transmits a polling signal directed to all slave stations from a transmitting part 12. Each slave station receives this signal by a receiving part 15 and switches a switch circuit 19, which transmits normally received signals to a transmitting part 16, to transmit a response signal. This response signal passes only slave stations in the downstream of this slave station. Each slave station stores addresses of frames of passing response signals in a storage part 18. These stored addresses indicate addresses of slave stations in the upstream of this slave station. After a fixed time elasped, the master station transmits a signal, which instructs slave stations to report lists of stored addresses to the master station, to all slave stations. When receiving this signal, each slave station transmits the stored address list as data. The master station receives address lists from individual slave stations and counts and compares them to recognize the connection order of slave stations.
申请公布号 JPS60128739(A) 申请公布日期 1985.07.09
申请号 JP19830237273 申请日期 1983.12.16
申请人 FUJITSU KK 发明人 TAKEYAMA AKIRA;TAZAKI TAKASHI;AZUMA MITSUHIRO;MATSUDA MASAHIRO
分类号 H04L12/403 主分类号 H04L12/403
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