| 摘要 |
PURPOSE:To spread an operating-voltage margin while keeping service voltage from the outside to a low value, and to improve sensitivity by biassing the substrate potential of a charge transfer gate electrode in reversed polarity by a DC voltage conversion circuit and converting only a charge transfer gate electrode at a final step being in contact with an output gate electrode at a pulse level. CONSTITUTION:DR1 and DR2 each represent driver circuits for driving charge transfer gate electrodes 11P, 12P by external clock pulse inputs, phi1, phi2, and DR3 represents a pulse-level conversion circuit converting the pulse amplitude of the external clock pulse input phi2 into the level of pulses phi2''. When the external clock pulses phi1, phi2 are each inputted to the driver circuits DR1, DR2, pulses phi1' and phi2' are applied severally to the charge transfer gate electrodes 11P, 12P, and the charge transfer gate electrodes 11P, 12P are driven. When the external clock pulse input phi2 is inputted to the pulse level conversion circuit DR3, pulses phi2'' are applied to charge transfer electrodes 13P, 14P at a final step to drive the electrodes 13P, 14P. |
