发明名称 SIGNAL CORRECTING CIRCUIT
摘要 PURPOSE:To enable the accurate and rapid detection of the rising width of an input signal, by triggering an input signal at two threshold levels and performing weighting during a triggering period. CONSTITUTION:An input signal is amplified to a supersaturation signal 1 by an amplifier circuit 150 while said signal is applied to first and second threshold circuits 102, 104 having threshold values VT1, VT2 while the circuit 102 supplies an output rectangular wave 3 to an AND gate 106, an EXOR gate 108 and a falling detection circuit 110. The gate 106 supplies a number of clock pulses corresponding to a period during which a signal 3 exceeds the value VT1 to a first counter circuit 118 and the gate 108 forms a pulse 4 corresponding to a period during which the signal 3 is present between the values VT1, VT2 while the gate 114 imparts a clock pulse during the period of the pulse 4 to a second counter circuit 120 and the circuit 110 supplies the detection signal in the falling of the signal 3 to an operation processing circuit 116. The circuit 116 performs weighting due to constant K {K=(VT2-VT1)/VT2} to one counting output and adds said output to the other counted value to impart the added value to a display device 122.
申请公布号 JPS60127471(A) 申请公布日期 1985.07.08
申请号 JP19830235655 申请日期 1983.12.14
申请人 TOUKIYOU KOUGAKU KIKAI KK 发明人 WAKE MICHIO;KOBAYASHI MASAKI
分类号 G01R29/02;H03K5/00;H03K5/01;H03K5/1532 主分类号 G01R29/02
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