| 摘要 |
PURPOSE:To simplify circuit constitution by using an AND and an OR gate, one flip-flop, and one pulse detecting circuit and detecting N pulse trains. CONSTITUTION:While pulse trains 15-17 are inputted, the N-input AND gate 11 reads a pulse train 18 out and the OR gate 12 also reads a pulse train 19 similarly to input them to the FF13, whose Q-terminal output is inputted to the D terminal, so input pulses are frequency-divided by two to send an output pulse train 21. The pulse detecting circuit 14 decides whether there is the pulse 21 or not. If even one of the pulse trains is ceased and held at ''0'', the AND gate output is fixed at ''0'' and the FF output is also fixed to decide on a pulse break by the detecting circuit 14. When one of the pulse trains is at ''1'', the OR gate output is fixed at ''1'' and the detecting circuit decides on a pulse break. |
