Clock system for control systems with digital information processing

摘要

The invention relates to a clock system for control systems with digital information processing. The object of the invention is to implement a clock system for a control system with digital information generation in which a phase-synchronous processing of the digital information is carried out at the zero passage of the mains voltage of the power component, thereby minimising the cost of eliminating the effects of noise and thus of suppressing noise.
<??>This is achieved by using a monoflop to shift the phase angle of the mains voltage, which is converted via optocouplers or transformers and threshold value switches into a square-wave voltage, in such a way that the clock coincides precisely with the zero passage of the mains voltage and the clock width is then set via a further monoflop.