发明名称 |
LOGICAL WAVEFORM GENERATOR |
摘要 |
PURPOSE:To eliminate the need for the clock for control over pin multiplexing by converting data for controlling an output waveform into a form suitable for the pin multiplexing and generating the waveform of either channel. CONSTITUTION:A converting circuit 3011 generates four bit data 3141-3171 to be inputted to an odd-channel side shift register 3031 in pin multiplex mode. Further, an odd-channel side shift register control circuit 3021 generate a clock 3111 and an operation selection signal 3121 with three clocks 3081-3101 and control data 3201 consisting of several bits. Then when a control signal 319 becomes logic 1, a gate 304 is opened and clock signals 3111 and 313 (3112) generated by odd- and even-channel side shift register control circuits 3021 and 3022 are supplied to the shift register 3031 through an OR gate 305. |
申请公布号 |
JPS60125013(A) |
申请公布日期 |
1985.07.04 |
申请号 |
JP19830232813 |
申请日期 |
1983.12.12 |
申请人 |
HITACHI SEISAKUSHO KK |
发明人 |
ORIHASHI RITSUROU;HAYASHI YOSHIHIKO |
分类号 |
H03K3/78;G01R31/3183;H03K5/00;(IPC1-7):H03K5/00 |
主分类号 |
H03K3/78 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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