Time-delay circuit for a distance-measuring device, in particular for radar applications

摘要

A good resolution, specifically relatively jitter-free, is achieved by the use of the time-delay circuit (VS1) in the distance-measuring device of a radar. This is achieved when the time-delay circuit (VS1) consists of the series circuit of a counter (Z1) and an analogue delay line (VL1) having a plurality of taps which are connected in each case to one input of a multiplexer (MUX1), the time-delay circuit (VS1) being inserted between the output of an oscillator (O1) and the input of a scanner (AB1). The advantage of the time-delay circuit (VS1) consists in that the oscillator can be as slow as if no delay line (VL1) were present. <IMAGE>