| 摘要 |
<p>An automatic clock recovery circuit (18). The automatic clock recovery circuit samples a received data signal with a recovered clock signal and advances or retards the recovered clock signal based on the comparison between the received data signal and the recovered clock signal. The automatic clock recovery ciruit (18) selectively cancels advance "A" or retard "R" corrections in the presence of bias distortion and phase ambiguities to improve the lock acquisition time for recovered clock.</p> |
